Subproject

R2

Categories

Real-time analysis methods for hardware architectures

Overview

ORCA-RT provides an IDE for graphical modelling of function networks together with the underlying hardware architecture, and the infrastructure for embedding various real-time analysis methods of such systems. The most notable analysis technique developed in the context of AVACS is a design space exploration framework for finding optimized hardware architectures for a given function network. This includes the translation and import from Matlab Simulink models into function networks. ORCA-RT also provides an interface to perform model checking of systems using external MC engines such as Uppaal.

Publications

E. Thaden, H. Lipskoch, A. Metzner, and I. Stierand. Exploiting gaps in fixed-priority preemptive schedules for task insertion. In 16th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), pages 212-217, 2010.

M. Büker, K. Grüttner, P.A. Hartmann, and I. Stierand. Mapping of concurrent object-oriented models to extended real-time task networks. In Forum on Specification & Design Languages (FDL), 2010.

H. Dierks, A. Metzner, and I. Stierand. Efficient model-checking for real-time task networks. In 6th International Conference on Embedded Software and Systems, pages 11-18, 2009.

A. Metzner, M. Fränzle, C. Herde, and I. Stierand. An Optimal Approach to the Task Allocation Problem on Hierarchical Architectures. In Proceedings of the 20th IEEE International Parallel and Distributed Processing Symposium, 2006.

A. Metzner and C. Herde. Rtsat - an optimal and efficient approach to the task allocation problem in distributed architectures. In Proceedings of the IEEE Real-Time Systems Symposium, pages 147-156, 2006.

J. Eisinger, I. Polian, B. Becker, A. Metzner, S. Thesing, and R. Wilhelm. Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis. In Proceedings of the 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems, 2006.

F. Eisenbrand, W. Damm, A. Metzner, G. Shmonin, R. Wilhelm, and S. Winkel. Mapping Task-Graphs on Distributed ECU Networks: Efficient Algorithms for Feasibility and Optimality. In Proceedings of the 12th IEEE Conference on Embedded and Real-Time Computing Systems and Applications, 2006.

Benchmarks

ViDAS

Download

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Manual

Integrated Online Help

Status

Stable